A harmonic elimination and suppression scheme for an open-end winding induction motor drive
نویسندگان
چکیده
منابع مشابه
A harmonic elimination and suppression scheme for an open-end winding induction motor drive
In this paper, a harmonic elimination and suppression scheme for a dual-inverter-fed open-end winding induction motor drive is presented. Two isolated dc-link sources with voltage ratio of approximately 1 : 0.366 are required for the present drive. These two isolated dc links feeding two inverters to drive the openend winding induction motor eliminate the triplen harmonic currents from the moto...
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Open-end winding induction machines fed from two standard two-level voltage source inverters (VSI) provide an attractive arrangement for AC drives. An alternative approach is to use a dual output indirect matrix converter (IMC). It is well known that IMC provides fully bidirectional power flow operation, with small input size filter requirements. Whilst a standard IMC consists of an AC–DC matri...
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scheme proposed here makes the individual inverter A space vector PWM technique is developed based switching frequency equal to half of the motor phase on the combination of space vectors from dual inverters switching frequency. %is results in low inverter switching feeding the induction motor from both ends (open-end with reduced power circuit complexity when compared to winding without neutra...
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A six-level inverter system for an open-end winding induction motor drive is presented in this paper. Multilevel inversion is achieved by feeding an open-end winding induction motor with a 3-level inverter from one end and a 2-level inverter from the other end of the motor. The 3level inverter used in the proposed drive, is realized by cascading two 2-level inverters. The combined inverter syst...
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Absrracl--A dual two-level inverter fed open-end winding induction motor drive is proposed in this paper. A total of 64 voltage space phasor combinations are possible in this scheme as each inverter produces eight voltage space phasors. The proposed scheme produces voltage space phasor locations similar to that of a 3-level inverter. In a 3-level Inverter the series connected DC link capacitors...
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ژورنال
عنوان ژورنال: IEEE Transactions on Industrial Electronics
سال: 2003
ISSN: 0278-0046
DOI: 10.1109/tie.2003.819670